Non-Photolithographic Nanoscale Memory Density Prospects

Technologies are now emerging to construct molecular-scale electronic wires and switches using bottom-up self assembly. This opens the possibility of constructing nanoscale circuits and memories where active devices are just a few nanometers square and wire pitches may be on the order of 10 nanometers. The features can be defined at this scale without using photolithography. The available assembly techniques have relatively high defect rates compared to conventional lithographic integrated circuits and can only produce very regular structures. Nonetheless, with proper memory organization, it is reasonable to expect these technologies to provide memory densities in excess of 10¹¹ bits/cm² with modest active power requirements under 0.6W per Tb/s for random read operations.

Paper

• IEEE Xplore PDF [1MB]
• IEEE Xplore URL for Abstract
• Errata -- a few errors in examples and equations