Penn Logo
Vertical Line

Implementation of Computation Group

Divider

Impact of Memory Architecture on FPGA Energy Consumption


This page links to a distribution source archive for: Impact of Memory Architecture on FPGA Energy Consumption

  • tar file with source distribution (400 KB), last updated on 3/17/2015, includes:
    • Source code for p-opt
    • Architecture file generator for VTR Architecture Files with embedded memories with enables that work with p-opt

Acknowledgment

This research was funded in part by DARPA/CMO contract HR0011-13-C-0005. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the authors and do not reflect the official policy or position of the Department of Defense or the U.S. Government.
Divider
Room# 315, 200 South 33rd Street, Electrical and Systems Engineering Department, University of Pennsylvania, Philadelphia, PA 19104.