Transit Note #16b

Testing with the RN1 Slow Tester

Tim Kutscha

James Ooi

Tue Nov 9 12:46:32 EST 1993

The Programmer's Perspective

We will use a Symbolics XL1200 Lisp Machine to test the RN1 chip with the Slow-Tester board. The XL1200 I/O boards do not use the VME bus for any other purpose than to drive slave cards; therefore, we have the entire addressing range of the VME bus to run the Slow-Test board with one exception: The XL1200 uses the first 16K bytes of VME bus address space for pseudo-memory and debugging purposes. This exception forces us to configure address bit A15 high on the Slow Test board. All other bits (A14-A07) can be used in any combination. Currently, the Slow-Test board is configured to look at base address hex 0xEE00. To change this, you must reprogram the 20v8 PAL equations (see [Kut90] ) in the file address.fsm in the /home/ar/transit/doc/note/tn15 directory and re-burn a 20v8 PAL. The test board only needs 128 bytes of consecutive address space to run (A06-A01 is 6 locations x 2 bytes per location because A00 doesn't exist), so this should leave plenty of other space for future slave boards.

When reading and writing to the Slow-Test board through the VME bus, we use 16 data bits and 16 address bits. This requires using an address modifier of hex code 0x29 (which I will explain how to use later). Since address line A00 doesn't exist on the VME bus, we can only write to even numbered addresses when writing 16-bit data. Therefore, the port addresses starting at port 0 on the test board would be 0xEE00, 0xEE02, 0xEE04... and so on.

I have included several primitive funtions in the file slow-tester.lisp in the directory b:>transit>sim. Here is a list of some of them along with a brief description.

This file works closely with the rchip-test-vectors.lisp file located in the same directory. Other functions not listed are used by the functions above or by the functions in rchip-test-vectors.lisp. Talk to Henry Minsky about how the additional functions work. The file slow-tester.lisp is supposed to replace the file rsim-core.lisp which uses the RSIM package on the Lisp Machines to simulate RN1. By replacing the primitive file, we can interface the test vector file directly with the chip instead of running it through the simulator. Reading a port on the chip whose output is tristate should result in a hex value 0xFFFF return value, but 0xFFFF can also be a valid return.

See Also...

Port and Bitmap Data

Due to the odd reordering of the ports, Table 1 lists the port addresses for the various input and output ports on the slow test board in decimal relative to the base address. When reading and writing to RN1 use (chip-write address data) and (chip-read address) where address is one of the decimal numbers in Table 1.

When clocking the RN1 chip by setting address line A05 high, you should call the subroutine (chip-write) as follows:

(chip-write #x20 data) where the bits in data are listed in table 2. #x20 represents binary code 00100000 where the fifth significant bit on the address line (A05) is high. All other address bits (except for the base address which is already defined) are irrelevant when calling (chip-write).

When driving the switching pads to RN1 by setting address line A06 high, you should call (chip-write) as follows:

(chip-write #x40 data) where the bits in data are mapped out as in Table 3. #x40 represents binary number 01000000 with the sixth addressing bit (A06) set high. All other address bits (except the previously defined base address) are irrelevant.

Example Programming

References

Kut90
Tim Kutscha. The rn1 slow test board hardware. Transit Note 15, MIT Artificial Intelligence Laboratory, 545 Technology Square, Cambridge MA 02139, May 1990.

Min90
Henry Q. Minsky. Rn1 data router. Transit Note 26, MIT Artificial Intelligence Laboratory, 545 Technology Square, Cambridge MA 02139, July 1990.

MIT Transit Project