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Implementation of Computation Group


Asymmetry in Butterfly Fat Tree FPGA NoC

Dongjoon Park, Zhijing Yao, Yuanlong Xiao, and André DeHon
Proceedings of the IEEE International Conference on Field-Programmable Technology, (FPT, December 11--December 14, 2023)

Among various topologies for FPGA overlay Network-on-Chip (NoC), the Butterfly Fat Tree (BFT) is known to be fast and lightweight. The BFT has a hierarchical structure that allows the routing capacity of each level to be configured with bandwidth-reducing t switches and bandwidth-preserving π switches, and this configuration can be exploited to customize the NoC resources, spending area as needed to match the bandwidth requirements of the application. However, a traditional BFT is symmetric: switch types in all subtrees in the same level are identical; this does not fully exploit the customization offered by the FPGA. We evaluate asymmetric BFTs that have different bandwidth in their subtrees, and we develop a converging switch built with t switches that connects subtrees with different bandwidths. Given the same resource budget, asymmetric BFTs perform better than symmetric BFTs when NoC traffic is highly unbalanced. In realistic workloads and statistical traffic patterns, asymmetric BFTs achieve up to 32% and 76% more throughput than symmetric BFTs, respectively.

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