Dedicated point-to-point wires (DW) can be used in place of a
Packet-Switched Networks-on-a-Chip (PSNoC) for fast linking of
separately-compiled FPGA blocks, providing higher bandwidth and performance
with less area overhead without increasing compile time. Previous work
showed that separate compilation of FPGA modules using a pre-compiled FPGA
overlay could reduce the long FPGA compile time by defining and separately
mapping small partially reconfigurable blocks (Processing Elements) and
using a fixed PSNoC to connect them together. Nonetheless, the lightweight
PSNoC cannot meet the high data transmission requirements for some critical
links, limiting overall performance. We demonstrate that DWs, where the
producer ports and consumer ports are directly connected instead of sharing
limited-throughput, packet-switched connections, can provide us with high
throughput between Processing Elements (PEs) while preserving the fast
compile time; the DWs also reside on partially reconfigurable blocks and
can be compiled along with the reconfigurable PEs simultaneously on the
cloud. Adjacent pages can be connected by fast links with low latency.
Mapping Rosetta Benchmarks, we show that the application-customized direct
networks can offer 1.5--10x performance gain and 47--86% interface area
overhead savings compared to previous work with PSNoCs.
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